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Forum Details

Tuesday, August 9th
Tues, Aug 9th
8:30-10:50am
Forum A-11: NVMe and PCIe SSDs Part 1 (PCIe Storage Track)
NVMe Workgroup Report: Updates, Trends, Directions, and Plans (8:30-9:35am)
Organizer/Chairperson: Larry Chisvin, Product Planning/PCIe Express Switching, Broadcom
Speaker:
Amber Huffman, Fellow/Director Storage Interfaces, Intel
Panelist:
JonMichael Hands, Product Marketing Manager, Intel
Peter Onufryk, Fellow/NVM Solutions, Microsemi and Member, NVMe Workgroup Board
Don Walker, Distinguished Engineer, Dell Office of the Enterprise CTO, and Member NVMe Workgroup Board
Forum Description:
NVMe has quickly become part of the storage mainstream, with almost every storage vendor deploying systems based on it. The specification continues to advance with new features and capabilities, and even more is being discussed for future versions. Architects and designers working on NVMe-based systems must be able to make the best use of new aspects and be aware of the directions in which the technology is moving.
Intended Audience:

Hardware and software designers, engineering managers, storage designers, storage engineers and specialists, product planners, product managers and product marketing managers, interface specialists, system engineers and managers, and marketing managers.

The session will include a panel of experts from the organization that drives the standard. The panel will allow the audience to clarify issues, ask questions, and voice opinions to the people who will determine the future of NVMe.

About the Speaker:

Amber D. Huffman is an Intel Fellow and the director of storage interfaces in the Non-Volatile Memory Solutions Group at Intel Corporation. She leads the development of storage interfaces and works to integrate the resulting technology in Intel products, with a focus on furthering Intel’s non-volatile memory (NVM) business initiatives.

A respected authority on storage architecture, Huffman has used her expertise and influence to lead Intel and the storage industry toward the definition and adoption of fast, streamlined, highly power-managed and low-latency storage interfaces. Her leadership role in industry standards efforts includes forming and chairing the NVM Express (NVMe) Workgroup, a consortium of companies working to define a standardized interface for PCI Express-based solid-state drives. Huffman was lead author and editor on the NVMe specification. She continues to lead technical development within NVMe. She chairs the board of directors for the NVMe Workgroup and the Open NAND Flash Interface (ONFI) Workgroup; both groups are coalitions of more than 90 technology companies.

Huffman has devoted her career to storage interfaces since joining Intel in 1998. Her early work focused on Serial ATA (SATA) technology, the storage interface standard implemented in most PCs today. She developed prototypes and began leading and writing portions of the standard, earning an Intel Achievement Award for her work. Huffman led the development of the Advanced Host Controller Interface (AHCI), which remains the standard programming interface for SATA today. Subsequently, she led the technical and industry development of ONFI, which standardizes the NAND Flash memory component interface and enables customers to use Flash from various hardware vendors. As with AHCI and NVMe, she served as lead author and editor on the ONFI industry specification.

Huffman earned a bachelor’s degree in computer engineering from the University of Michigan and a master’s degree in electrical engineering from Stanford University. She has been granted more than 20 patents in storage architecture and was named an Intel Fellow in 2016.

About the Organizer/Chairperson:
Larry Chisvin is a senior member of the Product Planning Team in the Broadcom Data Center Storage Solutions Group. He is currently focused on ensuring that NVMe devices offer the robustness, performance, and flexibility necessary for wide deployment in the data center. Larry previously held senior positions at PLX Technology, including VP Marketing, VP Strategic Marketing, and Chief Operating Officer. During his tenure there, PLX became the thought and market share leader in PCIe switching, with a major penetration in storage systems. Larry is co-inventor for four patents, has written articles in many leading industry publications, and has participated in many industry panels. He also has prior experience with Neomagic, LSI Logic, S3, Philips, Western Digital, and Digital Equipment. He received his BSEE from Northeastern University and his MSEE from Worcester Polytechnic Institute.
NVMe over Fabrics Panel - Which Transport Is Best? (9:45-10:50am)
Organizer/Chairperson: Brandon Hoff, Director Product Management, Broadcom
Panelists:
Introduction to the NVMe over Fabrics (NVMf) Standard and Linux Software Stack
Brandon Hoff, Director Product Management, Broadcom
NVMe over RDMA with Ethernet
Fazil Osman, Distinguished Engineer, Broadcom
NVMe over RDMA with Infiniband
John Kim, Director Product Marketing, Mellanox Technologies
NVMe over Fibre Channel
Praveen Midha, Director Software Product Management, QLogic
Forum Description:
NVMe over Fabrics can unleash the benefits of NVMe drives in a scalable manner by leveraging mainstream high-performance interconnects. Several fabrics have already taken the lead in proposed deployments, and others are being considered. The various fabrics have their pros and cons as a platform, and the choice depends on the value they provide specific applications and workloads. Tangible data and analysis are now available to cover performance, cost, scalability, and ease of design.
Intended Audience:
NVMe over Fabrics can unleash the benefits of NVMe drives in a scalable manner by leveraging mainstream high-performance interconnects. Several fabrics have already taken the lead in proposed deployments, and others are being considered. The various fabrics have their pros and cons as a platform, and the choice depends on the value they provide specific applications and workloads. Tangible data and analysis are now available to cover performance, cost, scalability, and ease of design.
About the Organizer/Chairperson:
Brandon Hoff is Director Product Management at Broadcom, where he focuses on new product strategy, including product development interlock, business planning, and sales strategy development for growth initiatives. He has also worked on innovation initiatives, end user strategies, technology and strategy solutions for Web giants, and product portfolio leadership. He has over 25 years of industry experience, including a stint as Chief Strategy Officer/Chief Marketing Officer at CipherOptics, where he was responsible for managing all aspects of marketing, corporate strategy, product management, field and corporate marketing, marketing communications, public relations, branding, and lead generation. He holds an MBA from the University of Colorado (Boulder) and a BSEE from Colorado State University.
Tues, Aug 9th
8:30-10:50am
Forum B-11: Flash-Memory Based Architectures: A Technical Discussion, Part 1 (Architectures Track)
Organizer/Chairperson: Brian Berg, President, Berg Software Design
Paper Presenters:
An NVMe SSD Architecture for Accelerating Big Data Analytics
Bharadwaj Pudipeddi, CTO/Head Engineering, NVXL Technology
An SSD Architecture That Combines Security and Performance
Jon Haswell, Sr Director Firmware Development, Micron
Machine Learning Techniques for Improving Flash Endurance
Conor Ryan, CTO, NVMdurance
New Approaches to Keeping Write Amplification from Reducing Flash Lifetime
Tim Canepa, Director Architecture, Seagate
Forum Description:
This session will include presentations about the key technical issues of flash memory-based architectures, particularly firmware and the Flash Translation Layer (FTL). Topics will include how data integrity, availability, and reliability are accomplished, as well as how targeted performance affects cost and architecture.
Intended Audience:
Hardware engineers and software engineers, and anyone with a curiosity or need to know the highly technical aspects of using flash memory-based devices to create resilient, portable, and ubiquitous storage media.
About the Organizer/Chairperson:
Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA and Fibre Channel; and Storage Area Networks (SAN) and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer and technical writer. He has participated in over 60 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters coursework at Stanford University.
Tues, Aug 9th
8:30-10:50am
Forum C-11: Enterprise SSDs (SSDs Track)
Organizer: Tom Coughlin, President, Coughlin Associates; Scott Shadley, Sr Product Line Manager, Micron Technology
Chairperson: Scott Shadley, Sr Product Line Manager, Micron Technology
Instructors:
How Accelerating SSD Capacities Will Revolutionize Enterprise Storage
Anders Graham, Product Marketing, Samsung
A Comprehensive Approach to Flash-SSD Quality Management for Enterprise
Jung Yoon, Sr Technical Staff Member, IBM
An Examination of User Workloads for SSDs
Eden Kim, CEO, Calypso Systems
I/O Pattern Based Optimization in SSD
Xiangfeng Lu, CTO, Memblaze
Delivering on NoSQL Database Performance Requirements with NVMe SSDs
Vijay Balakrishnan, Principal Engineer, Samsung
Designing SSD Firmware Overlays to Reduce Performance Impact
Tomislav Miladinovic, Firmware Design Engineer, Unigen
Forum Description:
Enterprise SSDs are achieving higher capacities and higher performance and are therefore used in more applications, displacing HDDs in a wide variety of environments. SSDs must trade off performance, data retention and endurance, and the variety of flash applications are leading to tiering approaches that include several types of flash memory devices. Presentations in the session will prepare you to buy the right enterprise SSD for your applications and to make sure that your system design uses the right flash memory in the right way.
Intended Audience:
Executives, Engineers, End Users, Technology Journalists, Press, Technologists, Marketing Professionals, Applications Engineers, Entrepreneurs, Academics, Students, and other Researchers.
About the Organizers:
Tom Coughlin is President of Coughlin Associates, a data storage consulting firm specializing in data storage components, systems, and software. He has over 30 years of industrial experience working at such companies as 3M, Polaroid, Seagate, Maxtor, Ampex, and SyQuest. He has created over 100 articles, reports, and technical presentations and holds 6 patents. Tom is the author of the book “Digital Storage in Consumer Electronics: The Essential Guide”, published by Elsevier. He is also the General Chairperson for the Flash Memory Summit and the organizer of the annual Storage Visions Conference and the Creative Storage Conference.
Scott Shadley is a Senior Product Line Manager, supporting Micron’s datacenter and enterprise SSD products including marketing initiatives. His responsibilities include roadmap definition, P&L ownership, customer engagement, and driving the marketing strategy for storage products. Previously, he was a Senior Product Marketing Team Manager, helped create the business development team within storage, and was a Product Marketing Manager for the SATA SSD programs. Scott has also been Director of Enterprise SSD Marketing at STEC. He earned a BSEE from Boise State University and an MBA from the University of Phoenix.
Tues, Aug 9th
8:30-10:50am
Forum D-11: Flash in Data Centers (Data Centers Track)
Organizer/Chairperson: Steve Garceau, Sr Manager Enterprise SSD Marketing, Toshiba
Paper Presenters:
Storage Class Memory and Operational Databases: Real-World Results
Brian Bulkowski, CTO/Founder, Aerospike, "NVMe
Driving Down Storage Costs for High-Performance Databases
Ibby Rahmani, Director Product/Solutions, DataCore
Why NVMe Will Replace SATA SSDs in the Data Center
Michael Smullen, SSD Product Marketing Manager, Samsung Semiconductor
The Winning Combination is FC-NVMe
Curt Beckmann, Principal Product Architect, Brocade
Intent-Defined Storage for the Container Era
Ashok Rajagopalan, Head Product Management, Datera
Developing a Server OS Drive for Big Data and Cloud Storage
CC Wu, Executive VP, Innodisk
Forum Description:
Flash can serve many purposes in data centers. It can provide an additional tier of fast-accessing storage, it can increase server performance and decrease latency, and it can provide caching for information traveling to and from the cloud. In turn, software optimized for flash will provide improved performance at no additional cost. Flash thus both makes applications run better and provides an efficient foundation for such new approaches as object storage, software-defined storage, storage virtualization, and the software-defined data center.
Intended Audience:
Data center managers and engineers; hardware and software designers; network engineers and managers; communications and networking specialists; system architects and engineers
About the Organizer/Chairperson:
Steve Garceau is Sr Manager Enterprise SSD Marketing at Toshiba America Electronic Components, where he focuses on strategic and technical marketing, business analysis/planning, product line management, sales training, and market research and analysis. He has been working in the flash memory area for 10 years with an emphasis on SSDs, PCIe/NVMe, and NAND flash. Before joining Toshiba, he worked in product management and marketing at QLogic, Viking Technology, and STEC. He holds a BS in Marketing – Business Administration from California State University Long Beach.
Tues, Aug 9th
8:30-10:50am
OPEN Forum G-11: Enterprise Applications Part 1 (Enterprise Applications Track)
Organizer/Chairperson: Tom Burniece, President, Burniece Consulting Services
Paper Presenters:
Why Did Al Jazeera Network Choose Flash Memory for Their Workflow?
Stephanie Brewer, Customer Advocate, AND Kurt Kuckein, Director of Product Management, Data Direct Networks
How Intuit Achieves 700% Faster Electronic Payments While Minimizing Risk DROP Customer Case Study 1
Bob Fine, Sr Director Product Marketing, Dell
McKesson Mixes SSDs with HDDs for Optimal Performance and ROI DROP Customer Case Study 2
Bob Fine, Sr Director Product Marketing, Dell
Why Wellmark Went to an All-Flash Solution
Mark Adams, Director Product Marketing/Business Strategy, Hitachi Data Systems and Dan King, Director ITS, Wellmark
FICO: We Guarantee Performance for High-Performance, SLA-Demanding Workloads
Derek Leslie, NetApp
Extreme Performance and the Cloud...A SaaS Provider's Journey
Steve Knipple, Principal Consultant, Cloud Shift Advisors, AND Mark Camillo, SVP/CTO, NWEA
Session Description:
Flash memory has enabled new storage system and computing architectures which can handle many enterprise applications far more efficiently than is possible with hard drives. This session will feature actual case studies by innovative storage companies, including descriptions of the problem, approach, and results. Applications will include virtual desktops, streaming media, SQL and NoSQL databases, OLTP, data warehousing, big data analytics, Hadoop/MapReduce, financial transactions, and in-memory computing. Customers will co-present with some speakers.
Intended Audience:
IT Managers, Application Administrators, Database Administrators, Application Developers, Data Center Architects, Storage Architects, Infrastructure Architects, System Architects, Storage Engineers, Storage Specialists, Software Engineers, Storage Managers, Network Engineers, Marketing Engineers, Consultants, Analysts, and System Administrators.
About the Organizer/Chairperson:

Tom Burniece is an independent business consultant with over 30 years of senior management experience in the networking and storage markets. He specializes in strategy formulation, business development, marketing, and due diligence. He has worked with well over 50 companies from unfunded startups to large public corporations, including venture and private equity firms.

He is a highly experienced CEO and board member and has been general manager with profit and loss responsibility for a billion-dollar division of Digital Equipment. Before becoming an independent consultant, he was also Chairman of Ciprico and a senior executive at Maxtor and Control Data. He holds a BEE from the University of Minnesota and an MSEE from Arizona State University. He is also a graduate of MIT’s Sloan Senior Executive Program.

Tues, Aug 9th
8:30-10:50am
OPEN Forum N-11: Flash Growth and Opportunity in China (Business Track)
Co-Organizers/Co-Chairpersons: Jianjun (Jerome) Luo, President, Sage Microelectronics; Chuck Sobey, Chief Scientist, Channel Science; Jerome Luo, CEO, Sage Microelectronics
Paper Presenters:
All Flash Micro NAS Project at HDU
Chris Tsu, Professor, Hangzhou Dianzi University
NVMe SSD Application in China's Hyperscale Datacenter
Taile Zhang, VP, Memblaze
Flash Applications Practice and Prospects in Chinese Enterprises
Cui Hao, Chief Editor, WatchStor
Exploiting the Minipage-level Mapping to Solve the Size Discrepancy of I/O Requests and Flash Pages
Wu Fei, Teacher, Huazhong University (China)
Logic Based ReRAM Assisted by Self-Adaptive Circuit for Embedded Applications
Yinyin Lin, Professor, Fudan University (China)
Reduce Write Amplification for All-Flash Arrays
Mingchang Wei, Research Engineer, Huawei,
Forum Description:
China is today a major player in both using and developing flash products. Those working at organizations outside China need to understand what is happening currently at Chinese companies, universities, and other organizations. The Chinese market offers many potential opportunities for products, services, and collaboration. Interests range throughout the non-volatile memory area, including development of new technologies, enterprise storage, embedded applications, and hyperscale datacenters.
Intended Audience:
Corporate executives, sales executives, marketing professionals, business development specialists, analysts, investors, engineering managers and directors, product planners, product and product marketing managers, and any flash industry participants interested in working in or learning more about China
About the Co-Organizers/Co-Chairpersons:
Jianjun (Jerome) Luo is the founder and president of Sage Microelectronics, a provider of ICs and solutions for digital storage and data security applications (including SSD controllers). It has offices in Silicon Valley and in Hangzhou, China. He is also a professor of electrical engineering at Hangzhou Dianzi University. Jerome helped organize the first flash memory conference held in China (the China Flash Forum held in Beijing on October 23, 2014). He has been an ASIC design engineer and Director of R&D at Initio and has designed more than 10 ASICs. He earned a PhD in semiconductor technology from Zhejiang University, a Master’s in Microelectronics from the Hangzhou Institute of Electronics Engineering, and a Bachelor’s in Electronics Engineering from Shanghai Jiaotong University.
Chuck Sobey is an internationally respected technology advisor, author, and lecturer. He is the founder of the confidential R&D services firm ChannelScience, which works with startups, Fortune 500 companies, and large institutions to develop new capabilities in data storage. He has deep expertise in the design, manufacture, and test of data storage devices. Chuck is currently evaluating new technologies and IP portfolios for 3D storage; developing signal processing and coding algorithms matched to the physics of spintronics-based sensors, storage elements, and processors; and advancing the state-of-the-art of data forensics. He was honored to be invited to give the opening keynote address at the first flash conference held in China. Chuck is an electrical and computer engineering graduate of Carnegie Mellon University and the University of California at Santa Barbara.
Tues, Aug 9th
11:00-11:30am
Vijay Rao photo
OPEN - Keynote 1: How We Use Flash at Facebook: Tiered Solid State Storage
Speaker: Vijay Rao, Director Technology, Strategy, Facebook
Introducer: Tom Coughlin, President, Coughlin Associates
Abstract:
Facebook obviously faces huge infrastructure challenges. Its 1.6 billion worldwide users create huge amounts of new data every day (including photographs and videos). Future demands will be even greater as Facebook enables richer experiences, increasing demands on storage and computing power. Facebook has been using flash memory for many years in a variety of ways, including for its databases. Disaggregation of resources has been an important theme at Facebook. This talk will describe how Facebook uses Lightning, their JBOF (Just a Bunch of Flash) to enable hierarchical storage. Furthermore, Facebook has been investigating the use of dense, ultra-low-endurance flash as a repository for large data items. Facebook expects to use new memory technologies such as Intel/Micron 3D XPoint™ to create new architectures based on persistent memory (non-volatile memory with DRAM-like access speeds).
About the Speaker:
Vijay Rao is the Director of Technology and Strategy at Facebook. His responsibilities include defining and optimizing Facebook’s infrastructure while working closely with its software teams to design high-performing systems. He works closely with partners to define future products in their roadmap. He is passionate about all things related to scale out infrastructure. Before joining Facebook, he was a Technologist in the Office of the CTO at AMD, where he was primarily responsible for cloud-related products. He has also been the founder of an enterprise security company and a CPU design engineer at Intel. He holds four patents and has published several articles. He earned an MSEE from Purdue University.
About Facebook:
For more information, see fb.com.
Tues, Aug 9th
11:30am-Noon
Darren Thomas photo
OPEN - Keynote 2: Turning Big Data into Critical Business Advantage with Flash Memory
Speaker: Darren Thomas, VP/GM Storage Business Unit, Micron
Introducer: Tom Coughlin, President, Coughlin Associates
Abstract:
Enterprises today have more data than they can currently handle with an unimaginable 2.5 quintillion bytes being produced daily. How can flash memory help them get the most business advantage out of their data and stay competitive? There are currently many technologies that can play important roles. 3D NAND provides faster, larger devices at lower cost. 3D Xpoint™ offers nonvolatile devices that behave more like standard memories, producing storage at memory speeds. NVDIMM makes standard packages act like nonvolatile memory. NVMe speeds up today’s SSDs by putting them on the well-established, high-throughput PCIe bus. Storage and system engineers must use all these approaches to design platforms that can handle more business critical data faster and produce more insight into every aspect of enterprise operations. They can also meet other pressing needs such as lower energy consumption and reduced footprint. The end result is that flash will play a critical role in keeping enterprises both innovative and competitive in a fast-moving worldwide environment.
About the Speaker:
Darren Thomas is Vice President and General Manager of Micron’s Storage Business Unit, where he oversees the solid state storage business that ranges from hard disk drive replacements with solid state drives (SSDs) to enterprise-class storage solutions. He was previously VP/GM Storage at Dell, where he transformed the company from providing strictly OEM solutions to having its own distinct strategy and product lines, leading several acquisitions including EqualLogic and Compellent. He has also been VP/GM Storage at Compaq Computer, where he built the storage business to include server-based storage, midrange, and enterprise product lines. He has over 30 years of technical industry experience. An engineering graduate of the University of Memphis, Thomas was also instrumental in founding the Storage Networking Industry Association (SNIA).
About Micron:
For more information is see Micron.com.
Tues, Aug 9th
Noon-12:30pm
Yoichiro Tanaka photo
Jeff Ohshima photo
OPEN - Keynote 3: New 3D Flash Technologies Offer Both Low Cost and Low Power Solutions
Speaker: Shigeo (Jeff) Ohshima SSD Technology Executive, Storage & Electronic Devices Solutions Company, Toshiba, and Yoichiro Tanaka, Senior Fellow, Storage & Electronic Devices Solutions Company, Toshiba
Introducer: Tom Coughlin, President, Coughlin Associates
Abstract:
New flash applications have a wide variety of requirements, leading to a need for multiple 3D technologies. Wearables, smartphones, automobiles, and the IoT all require low power usage as well as high performance to process data locally. Data center applications require high density and low cost to meet the needs of such data-intensive tasks as real-time analytics, computational genomics, cloud computing, and video and image processing. New technologies such as QLC (Quadruple Level Cell) BiCS FLASH™ offer high density, low-cost solutions, while TSV (Through Silicon Via) NAND offers high performance with significant power reduction. A variety of new approaches are accelerating the data center revolution while also enabling broader compute and storage architectures.
About the Speaker:
Jeff Ohshima is a member of the Storage and Electronic Devices Solutions executive team at Toshiba, where he focuses on SSD development and applications engineering. He was previously VP Memory Technology Executive at Toshiba America Electronic Components focused on flash memory with an emphasis on SSDs. He has also been Senior Manager R&D in the advanced NAND flash memory design department, responsible for 70 nm, 56 nm, 43 nm, and 32 nm part design. He has worked on memory at Toshiba for over 30 years, including 20 years on DRAM where he acted as a lead design for application specific memories and did technical marketing. Ohshima has served as a Visiting Research Scientist at Stanford University. He holds a BSEE and MSEE from Tokyo’s Keio University.
Yoichiro Tanaka is a leading strategic researcher into next-generation medical data center initiatives. His research activities focus on new storage and computer architectures, with an emphasis on genomic and brain neurosciences. With over 30 years experience, he has a strong R&D background in storage technologies, and is the recipient of many awards in the field. Dr. Tanaka's achievements include the development of the world’s first PMR HDD product, the creation of a spintronics-based Giant Magneto-Resistive head, and work on NAND-based hybrid drives. He plays a research advisory role in Japan’s National Project for spintronics, and is active in many international academic conferences. He holds a PhD and MSEE in electronics engineering from Tohoku University (Japan) and has been a research scientist at the University of Minnesota’s Center for Micromagnetics and Information Technology
About Toshiba:
For more information, see Toshiba.co.jp.
Tues, Aug 9th
1:30-1:40pm
OPEN - Special Presentation 1 - TechTarget: Overview of TechTarget's Flash Storage-Oriented Websites
Speaker: Rich Castagna, VP Editorial, TechTarget Storage Media Group
Tues, Aug 9th
1:40-2:10pm
Siva Sivaram photo
OPEN - Keynote 4: Creating Storage Class Memory: Learning from 3D NAND
Speaker: Siva Sivaram, Executive VP Memory Technology, Western Digital
Introducer: Rich Castagna, VP Editorial, Storage Media Group
Abstract:

The next great challenge for storage companies will be developing Storage Class Memory (SCM), that is, nonvolatile memory with access rates and other characteristics more like DRAM than flash. However, the enormous promise of SCM in computing environments cannot be fulfilled unless the technology can escape the challenges of scaling. How can such a potentially fast, powerful, and high capacity technology be developed in a way that is both practical and economical enough for widespread commercialization? One approach is to draw on the lessons learned in developing 3D NAND.

The technologies differ, but memory engineers will again need to overcome lithographic complexity, limits in charge storage, and proximity effects of adjacent memory cells. These were all significant hurdles which were overcome during 3D NAND development. So creating SCM should involve equal attention to scaling and cost, and a focus on vertical rather than horizontal layers. Memory engineers must follow such approaches if they are to unleash the enormous promise of SCM.

About the Speaker:

Dr. Siva Sivaram is the executive VP of memory technology for Western Digital. He is responsible for the ongoing development of the company's industry-leading NAND flash memory, as well as next-generation technologies, including 3D NAND (BiCS) and 3DReRAM. Sivaram has over 30 years of experience in semiconductors, 3-D memory architectures, process technology, equipment and materials. He has held executive positions at Intel and Matrix Semiconductor, and at Western Digital after its acquisition of Matrix.

Under his leadership, Western Digital created the world’s first cross point 3D memory technology, the world leading 15nm 2D NAND technology, and the industry’s first 256 Gigabit (Gb) 3-bit-per-cell (X3) 48-layer 3D NAND chip.

Sivaram has also been a board member of several start-up firms, entrepreneur-in-residence at Crosslink Capital and XSeed Capital, a research scholar at Matsushita Electric, and an adjunct faculty member at San Jose State University.

Sivaram has published many technical papers as well as a textbook on Chemical Vapor Deposition, and holds several patents. He earned his doctorate and master’s degrees in materials science from Rensselaer Polytechnic Institute (RPI), where he now serves on the Board of Trustees.

About Western Digital:
For more information, see WesternDigital.com.
Tues, Aug 9th
2:10-2:40pm
Balint Fleisher photo
OPEN - Keynote 5: Using Storage Class Memory to Create Scalable Cognitive Computers 
Speaker: Balint Fleischer, Chief Research Officer Storage, Huawei Technologies
Introducer: Rich Castagna, VP Editorial, Storage Media Group
Abstract:

Learning systems such as cognitive computers can vastly improve enterprise management and decision making. They are designed to provide new insight derived from analyzing multiple large, diverse data sets.

They use advanced analytics to sense, learn, infer, and interact with the user. They can even participate in joint discovery processes and scenario planning, activities that are far beyond the capabilities of today’s systems.

However, such platforms are very complex and have huge computational requirements. Implementing them requires a new way to process, manage, and share information in which storage class memory (non-volatile storage accessible at memory speeds) plays a key role.

About the Speaker:

Balint Fleischer is currently Chief Research Officer at Huawei’s Central Research Institute, where he is responsible for research and technology planning in the storage area. Widely recognized as one of the leading computer architects in the technology industry, he was most recently CTO at startup Parallel Machines, where he developed new architectures for advancing predictive analytics and machine learning. He was previously General Manager and Director of Architectures for Workstation, Storage, and Server Platforms at Intel, where he managed Atom and Xeon server architecture development, including efforts related to 3DXPoint ™ and Rack Scale Architecture. He also had long experience at Sun Microsystems including being VP/CTO Networked Storage Division, where he led the design of next generation storage systems and storage virtualization platforms. He led Sun’s architecture development for many successful low end and midrange server products and was responsible for the company’s InfiniBand effort focusing on enterpriseclustering, I/O, and storage.

He holds several patents, has published articles in many trade and technical journals, is a frequent participant at major conferences and in standards groups, and is often quoted in the trade and technical press.

About Huawei Technologies:
For more information, see Huawei.com
Tues, Aug 9th
2:40-3:10-m
Zining Wu photo
OPEN - Keynote 6: Managing Multi-Tiered Non-Volatile Memory Systems for Cost and Performance
Speaker: Dr. Zining Wu, Chief Technology Officer, Marvell
Introducer: Rich Castagna, VP Editorial, Storage Media Group
Abstract:
Manufacturers have recently introduced a wide range of new or greatly improved non-volatile memories, including 3D XPoint™, MRAM, RRAM, and specially tuned NAND flash for cold storage. They all have useful characteristics in many applications, and designers will want to take advantage of several or even all of them. The problem is how to scale out the resulting storage and manage data transfer between different types (or tiers) to achieve the highest performance at the lowest cost. Hardware-based cache management engines can provide high-performance solutions for the higher-performing tiers. For the lower tiers, designers can reduce overall system cost by concatenating expandable controllers to manage larger drives rather than developing new ASICs or looking for new standard products.
About the Speaker:

Dr. Wu serves as Chief Technology Officer of Marvell Technology Group Ltd., a position he has held since January 2014. In this role, Dr. Wu is responsible for overseeing all technical aspects of the company including establishing the company’s technical vision and strategic innovation initiatives, and directing R&D project execution and future growth.

Prior to his current position, Dr. Wu was Vice President, Data Storage Technology at Marvell. In this role, he was responsible for leading the engineering group that delivers innovative storage technologies for the hard disk drive (HDD) and solid-state drive (SSD) electronics markets. During his leadership, Marvell announced the world’s first low-density parity-check (LDPC) code based SSD controller that more than triples the reliability of NAND flash; the first native PCIe SSD controller for modular scalability, raising the bar in data storage by delivering an unprecedented level of I/O performance; and the world’s first NVRAM-powered PCIe SSD cache solution providing industry-leading performance for cloud computing data centers. In addition, also during his tenure, Marvell achieved a significant milestone with Western Digital, with the two companies shipping more than one billion hard disk drives with Marvell controllers. Previous to this role, Dr. Wu held various engineering and managerial roles within Marvell, including Vice President of Engineering for wireless communication SoCs, where his team delivered the industry’s best-in-class 802.11ac chips. He joined Marvell in July 1999.

Dr. Wu holds a Bachelor of Science degree in Electronic Engineering from Tsinghua University in Beijing, China, and a Master of Science degree and Ph.D. in Electrical Engineering from Stanford University. Dr. Wu holds over 280 U.S. patents and has published eight technical papers and a book related to data storage technology titled, “Coding and Iterative Detection for Magnetic Recording Channels.”

About Marvell:
Fore more information, see Marvell.com
Tues, Aug 9th
3:20-5:45pm
Forum A-12: NVMe and PCIe SSDs Part 2 (PCIe Storage Track)
Part 3 - NVMe Drivers – Current Status and Future Expectations (3:20-4:25pm)
Organizer: Larry Chisvin, Product Planning/PCIe Express Switching, Broadcom
Chairperson: Uma Parepalli, Firmware Architect, SK Hynix Memory Solutions
Panelists:
Lee Prewitt, Principal Program Manager Lead, Microsoft
Sudhanshu Jain, Product Management, VMware
James Harris, Storage Software Architect, Intel
Parag Maharana, Architect, Seagate Technology
Forum Description:
NVMe drivers are now available for all the most popular operating systems. Practitioners must understand the latest key features and architectural innovations, as well as how to achieve top performance on both client and server platforms. The drivers also have non-obvious features that enable more flexible and robust system implementations. Many new capabilities have been added recently, and practitioners should become familiar with them and should understand what they can expect to see moving ahead.
Intended Audience:
Intended Audience: Hardware and software designers, engineering managers, storage designers, storage engineers and specialists, product planners, product managers and product marketing managers, interface specialists, system engineers and managers, and marketing managers.
About the Organizer/Chairperson:
Uma Parepalli is a Storage and Firmware Architect at SK Hynix Memory Solutions, where he is currently focusing on PCIe NVMe firmware, UEFI BIOS, and hardware-software co-design and development. He is SK Hynix’s organizational representative for industry standards groups, including NVM Express, UEFI, and ACPI. Uma previously worked for such companies as EMC, LSI, Dell, Intel, and Wipro and continues to collaborate with every major OEM, OS, BIOS, and device vendor. He has over 24 years experience in the technology industry in architecture and senior management roles leading global engineering teams. He is a Computer Engineering graduate of the University of Mysore, India.
Part 4 – Lessons Learned Deploying NVMe in Real Systems (4:35-5:45pm)
Chairperson/Organizer: Tom Heil, Sr Systems Architect, Broadcom Hoff, Director Product Management, Broadcom
Panelists:
Gary Kotzur, Executive Director/Sr Distinguished Engineer, Dell
Ziv Serlin, Director System Architectures, E8 Storage
Donald Faw, Principal Engineer/Staff Architect, Intel
Tim Emami, Technical Director, NetApp
Chris Petersen, Hardware Systems Engineer, Facebook
Forum Description:

The industry is intent on unleasing the performance potential of NVMe flash storage in data centers, websites, clouds, and other facilities. However, deploying NVMe flash beyond early-market PCIe host bus adapters is pushing the interface well past its traditional role handling a few in-server (non-serviceable) adapter slots. Expanding NVMe flash’s role beyond simple caching into the broader storage infrastructrure introduces many challenges. They include new power/cooling and routing paradigms, robust serviceability and manageability, scalability within and beyond the server, multi-server and high-availability topologies, and non-disruptive deployment strategies.

Real system developers can provide insight and practical advice on the leading edge of NVMe flash deployment, across a span of boundary-pushing use cases. What problems or limitations are they facing and how are they overcoming them? What feedback would they provide to ecosystem suppliers such as SSD vendors, driver and software developers, switch vendors, and standards bodies)? What might they do differently in the future?

Intended Audience:
Intended Audience: Hardware and software designers, engineering managers, storage designers, storage engineers and specialists, product planners, product managers and product marketing managers, interface specialists, system engineers and managers, and marketing managers.
About the Organizers/Chairpersons:

Tom Heil is a Senior Systems Architect and Distinguished Engineer in Broadcom's Datacenter Storage Solutions Division, where he is responsible for technology strategy, product line definition, and business planning. He is currently setting the strategic direction and driving the definition of Broadcom's next-generation NVMe and SAS storage controllers, which will assist the industry as it transitions from hard drives to flash memory. His broad expertise in server and storage technologies has played a vital role in establishing Broadcom's highly successful market positions in SAS and RAID.  Before joining Broadcom (previously LSI), Tom developed server architectures for NCR/AT&T, and cache and chipset architectures for Intel.

Tom is a 30-year veteran of the computer and storage industry, holds 17 patents in computer and I/O architecture, and was one of the primary authors of the original parallel PCI bus specification.  He has also been a frequent past presenter at the Flash Memory Summit. He earned an MSEE from the University of Louisville.

About the Forum Organizer:

Larry Chisvin is a senior member of the Product Planning Team in the Broadcom Data Center Storage Solutions Group. He is currently focused on ensuring that the company’s NVMe devices offer the robustness, performance, and flexibility necessary for wide deployment in the data center. Larry has over 25 years experience in the technology industry, covering business, marketing, and engineering. He has architected and designed memory systems, defined and brought to market complex semiconductor products, and led successful organizations in emerging markets.

Larry previously held senior positions at PLX Technology, including VP Marketing, VP Strategic Marketing, and Chief Operating Officer. He was a primary driver of the company’s PCIe product line and led the groups that both defined and implemented the company’s highly successful line of PCIe switches and bridges. During his tenure there, PLX became the thought and market share leader in PCIe switching, with a major penetration in storage systems.

Larry is co-inventor for four patents, has written articles in many leading industry publications (including CIO Review, Electronic Design, Electronic Products, and Network World), and has participated in many industry panels (at such conferences as Flash Memory Summit, Linley Tech Data Center Conference, PCI SIG Developer’s Conference, and the Supercomputing Conference). He also has prior experience with Neomagic, LSI Logic, S3, Philips, Western Digital, and Digital Equipment. He received his BSEE from Northeastern University and his MSEE from Worcester Polytechnic Institute.

Tues, Aug 9th
3:20-5:45pm
Forum B-12: Flash-Memory Based Architectures: A Technical Discussion, Part 2 (sponsored by CNEX Laboratories) (Architectures Track)
Organizer/Chairperson: Brian Berg, President, Berg Software Design
Paper Presenters:
Storage Controller Technologies for Next Generation Non-Volatile Memories
Hanan Weingarten, Sr Director, Broadcom
Employing ECCs via Overprovisioning to Improve Flash Reliability – A New, Cost Efficient Approach
Stella Achtenberg, Sr Engineer, Western Digital
Open-Channel SSDs and Host-Based Flash Translation Layers
Ronnie Huang, VP Engineering, CNEX Labs
How NVMe and 3D XPoint Will Create a New Data Center Architecture
Emilio Billi, CEO, A3Cube
Forum Description:
This session will include presentations about the most important technical issues of flash memory-based architectures, particularly firmware and the Flash Translation Layer (FTL). Topics will include how data integrity, availability and reliability are accomplished, as well as how targeted performance affects cost and architecture.
Intended Audience:
Hardware engineers and software engineers, and others with a curiosity or need to know the highly technical aspects of using flash memory-based devices to create resilient, portable, and ubiquitous storage media.
About the Organizer/Chairperson:
Brian Berg is President of Berg Software Design, a storage systems consultancy. He has a wealth of experience with flash memory, optical storage, magnetic storage and RAID arrays; USB, SCSI, iSCSI, SAS, IDE/ATA/ATAPI/SATA and Fibre Channel; and Storage Area Networks (SAN) and server blades. Brian has been a software and firmware developer, project lead, industry analyst, seminar leader, technical marketer and technical writer. He has participated in over 60 conferences as a speaker, session chair, and conference chair, and has worked extensively with intellectual property and patents. He has a BS in Mathematics, and has completed CS and EE Masters coursework at Stanford University.
Tues, Aug 9th
3:20-5:45pm
Forum C-12: SSD Technology (SSDs Track)
Organizers: Tom Coughlin, President, Coughlin Associates; Scott Shadley, Sr Product Line Manager, Micron Technology
Chairperson: Cameron Brett, Director SSD Product Marketing, Toshiba
Paper Presenters:
Securing the SSDs - NVMe Controller Encryption
Radjendirane Codandaramane, Manager Applications, Microsemi
Validating Analytic Write Amplification Models
Tom McCormick, Chief Engineer/Technologist, Swissbit
Storage Intelligence SSD: Increasing SSD Performance and Lifetime with Multi-Stream Technology
Changho Choi, Principal Engineer, Samsung
Eliminating Catastrophic Uncorrectable Read Error (URE) Induced SSD Failures
Troy Rutt, Director Sales, Sage Microelectronics and Jerome Luo, CEO, Sage Microelectronics
Testing Controller Memory Buffer Performance in an NVM Express SSD
Ramyakanth Edupuganti, Sr Product Research Engineer, Microsemi
Standards for Improving SSD Performance and Endurance
Bill Martin, SSD IO Standards, Samsung Semiconductor
Forum Description:
Users of SSDs in the data center must deal with performance consistency, endurance, and usability. Such characteristics depend on many factors. Boosting performance while increasing the lifetime of flash memory requires changes in operations. Meanwhile, security is becoming more important as flash becomes the primary storage in data centers. Devices are subject to failure modes that can be addressed. This session will explore security; write amplification and endurance, multi-stream technology, flash failure modes, memory buffer performance, and standards.
Intended Audience:
Technologists, end users, hardware design engineers, storage designers, system designers, engineering managers, test engineers, product planners, product marketing engineers, CTOs, and storage managers and engineers.
About the Organizers:
Tom Coughlin is President of Coughlin Associates, a data storage consulting firm specializing in data storage components, systems, and software. He has over 30 years of industrial experience working at such companies as 3M, Polaroid, Seagate, Maxtor, Ampex, and SyQuest. He has created over 100 articles, reports, and technical presentations and holds 6 patents. Tom is the author of the book “Digital Storage in Consumer Electronics: The Essential Guide”, published by Elsevier. He is also the General Chairperson for the Flash Memory Summit and the organizer of the annual Storage Visions Conference and the Creative Storage Conference.
Scott Shadley is a Senior Product Line Manager, supporting Micron’s datacenter and enterprise SSD products including marketing initiatives. His responsibilities include roadmap definition, P&L ownership, customer engagement and driving the marketing strategy for storage products. Previously, he was a Senior Product Marketing Team Manager, helped create the Business Development team within storage, and was a Product Marketing Manager for the SATA SSD programs. Scott has also been Director of Enterprise SSD Marketing at STEC. He earned a BSEE from Boise State University and an MBA from the University of Phoenix.
Tues, Aug 9th
3:20-5:45pm
Forum D-12: Enterprise Storage Design Part 1 (Enterprise StorageTrack)
Organizer: Rob Peglar, Sr VP/CTO, Symbolic IO
Paper Presenters:
Picking the Right Infrastructure Model
Derek Leslie, Principal Product Manager, NetApp SolidFire
All-Flash Data Center Use Cases
Mark Adams, Product Marketing Manager, Hitachi Data Systems
Optimizing NVMe SSDs for Datacenter Systems
Jonathan Hinkle, Sr Research Staff Member, Lenovo
Making All Flash Data Centers a Reality
Nick Triantos, Storage Architect, Nimble Storage
Using SSDs Efficiently within a Scale-Out Software-Defined Storage Framework
Sudhakar Mungamoori, VP Customer Success/Sales Engineering, Formation Data Systems
Session Description:
Enterprise storage today must change to meet new requirements in the data center. Cloud computing, analytics, and big data are among the latest drivers, but existing drivers such as server and desktop virtualization, data tiering, efficient architecture and implementation of data policy still must be further addressed. Meanwhile, the numbers of applications and users keeps increasing, as does the need for rapid, predictable access. Solid state storage is an important technology in satisfying increased demand and providing quicker access at reasonable cost. However, managers must understand what flash technology can provide and how to make cost/performance tradeoffs. Flash-centric issues such as write amplification, wear, and endurance must also be understood to enable optimal architecture.
Intended Audience:
Enterprise Application Designers and Engineers; Data Scientists; Network and Data Center Directors, Managers and Engineers; Enterprise Storage System Designers; Software Designers, Enterprise Flash and SSD Product Managers & Marketing Engineers; Large-Scale Systems Designers; Investors & Analysts.
About the Organizer/Chairperson:

Rob Peglar is Vice President of Advanced Storage at Micron Technology. A 38-year industry veteran, he heads efforts in advanced storage systems strategy, leads executive-level planning and strategy for the Storage Business Unit with key customers and partners worldwide, and defines future storage offering portfolios incorporating Micron technology. He serves on the Board of Directors of SNIA and has been co-chair of the SNIA Analytics and Big Data Committee and the SNIA Tutorials, and director of the SNIA Solid State Storage Initiative. He serves as an advisor to the Flash Memory Summit. He was named an EMC Elect in 2014 and 2015. He was one of 25 senior executives worldwide selected for the CRN ‘Storage Superstars’ Award in 2010.

Before joining Micron, Mr. Peglar was Chief Technology Officer Americas at EMC Isilon, leading the field-facing technical effort to enable Isilon to reach its current status as world leader in enterprise scale-out NAS. He has also been Senior Fellow and Vice President of Technology at Xiotech and has held key technology specialist and engineering leadership positions at StorageTek, where he designed hundreds of enterprise SANs. He has written many articles for such media as CIO Update, SearchStorage, and Information Management. He is also a frequent conference chairperson and presenter in such venues as SNIA events, Flash Memory Summit, and Interop.

Mr. Peglar holds a BS in Computer Science from Washington University (St. Louis, MO) and performed graduate work there.

Tues, Aug 9th
3:20-5:45pm
OPEN Forum G-12: Enterprise Applications Part 2 (Enterprise Applications Track)
Organizer: Tom Burniece, President, Burniece Consulting Services
Chairperson: Chris DePuy, VP, Dell'Oro Group
Paper Presenters:
New Era of Enterprise Storage: How OpEx is Replacing CapEx
Nelson Nahum, CEO, Zadara Storage
Flash Storage Drives a Better Bottom Line
Ivan Iannaccone, Product Line Manager, HPE
Keep Pace in the Cognitive Era
Mike Kuhn, VP Flash Systems, IBM
Increase Tier 1 Application Performance, Availability, and Flexibility While Reducing Cost
Ibby Rahmani, Director Product Marketing, Datacore Software
Session Description:
Flash memory has enabled new storage system and computing architectures which can handle many enterprise applications far more efficiently than is possible with hard drives. This session will feature actual case studies by innovative storage companies, including descriptions of the problem, approach, and results. Applications will include virtual desktops, streaming media, SQL and NoSQL databases, OLTP, data warehousing, big data analytics, Hadoop / MapReduce, financial transactions, and in-memory computing. Customers will co-present with some speakers.
Intended Audience:
IT Managers, Application Administrators, Database Administrators, Application Developers, Data Center Architects, Storage Architects, Infrastructure Architects, System Architects, Storage Engineers, Storage Specialists, Software Engineers, Storage Managers, Network Engineers, Marketing Engineers, Consultants, Analysts, and System Administrators.
About the Organizer:

Tom Burniece is an independent business consultant with over 30 years of senior management experience in the networking and storage markets. He specializes in strategy formulation, business development, marketing, and due diligence. He has worked with well over 50 companies from unfunded startups to large public corporations, including venture and private equity firms.

He is a highly experienced CEO and board member and has been general manager with profit and loss responsibility for a billion-dollar division of Digital Equipment. Before becoming an independent consultant, he was also Chairman of Ciprico and a senior executive at Maxtor and Control Data. He holds a BEE from the University of Minnesota and an MSEE from Arizona State University. He is also a graduate of MIT’s Sloan Senior Executive Program.

About the Chairperson:
Chris DePuy is a Vice-President at Dell’Oro Group, responsible for the Carrier IP Telephony, Enterprise Edge, Wireless LAN, Wireless Packet Core, and Storage market research programs. He has over 20 years of financial analysis, business analysis, and engineering experience. He has been a consultant with TS Cap and a research analyst covering software, communications, and Internet with Bowman Capital and Morgan Stanley. He was named the top ranking Equity Research Analyst in the data networking sector by Institutional Investor and Greenwich Research Survey. The co-author of a book, he holds a Masters in engineering from Cornell and a BS in engineering from Union College.
Tues, Aug 9th
3:20-5:45pm
Forum S-12: Flash and Software-Defined Storage (Software-Defined Storage Track)
Organizer/Chairperson: Siamak Arya, President, Siamak Arya Consulting
Paper Presenters:
All-flash Optimize Software Defined Storage
Ji Hyuck Yun, Project Manager, SK Telecom
Software-Defined Storage Using RDMA and PeerDirect
Philipp Reisner, CTO, Linbit
The Impact of SSDs on Software Defined Storage
Barbara Murphy, VP Marketing, Weka.io
Using Software-Defined Storage to Manage Flash
Priyadarshi Prasad, Sr Director Product Management, Atlantis Computing
Implementing Storage Abstraction in Existing Legacy Infrastructure
Farid Yavari, VP, FalconStor Software
Optimizing Software-Defined Storage for Flash Memory
Avraham ("Posa") Meir, Chief Scientist, Elastifile
Forum Description:
Data Centers require fast, agile, cost-effective storage. Flash technologies have proven their ability to deliver high performance for point enterprise applications. However, the full promise of flash in the enterprise will only be realized through software layers transforming flash media into agile, cost-effective, and robust storage systems. Software Defined Storage (SDS) is revolutionizing the delivery of storage systems to the enterprise. We discuss the enabling technologies that combine flash devices into agile enterprise storage systems through the use of software defined storage approaches. Can SDS break the remaining barriers to all flash adoption in the enterprise?
Intended Audience:
IT architects and managers; data center storage engineers and managers; network engineers and managers; hardware and software design engineers; engineering managers;data specialists; database administrators
About the Organizer/Chairperson:
Siamak Arya is an independent consultant focused on SSD and system architecture design including hardware and firmware architecture and algorithms, performance engineering, and expert witness work. His consulting projects have included high-performance SSD controller design, processor architecture and design, and performance analysis and improvement. He has done design review and analysis, performance analysis and tradeoff considerations, and special projects in architecture and performance. He was previously CTO at Greenliant Systems, where he developed high-performance PCIe SSDs, and Sr Director System Architecture at Silicon Storage Technology, where he developed flash controllers. He has over 30 years of industry experience. He holds a PhD in Computer and Communication Engineering from The University of Michigan.
Tues, Aug 9th
7:00-8:30pm
OPEN - Beer, Pizza and Chat with the Experts (Sponsored by Cadence)
Organizers: Tom Coughlin, President, Coughlin Associates; Jim Handy, Director/Chief Analyst, Objective Analysis
Table Leaders:
3D Flash
Mark Webb, Consultant, MKW Ventures; Erich Haratsch, Director Engineering, Seagate
Data Centers
Brandon Hoff, Director Product Management, Broadcom; Ron Herrmann, Director Sales Engineering, E8 Storage
Fabrics
Ahmet Houssein, Advisory Board Member, MSys Technologies
China
Bob Witkow, President, Westwood Marketing; William Cheng, Technical Leader Applications, Microsemi
Software
Vijay Ahuja, President, Cipher Solutions; Peter Maddocks, Director Product Management, Seagate
Standards
Tom Friend, Director Industry Standards, Toshiba
Markets
Lee Stein, Consultant, Stein Writes
Security
Robert Thibadeau, Chairman, Drive Trust Alliance; Michael Willett, VP Marketing, Drive Trust Alliance
Reliability/Performance
Chanson Lin, President, EmBestor Technology; Peter Murray, Product Evangelist, Virtual Instruments
Endurance
Joe Sullivan, CTO Hardware, NVMdurance
RDMA Interconnects
Bill Lee, Marketing Working Group Co-Chair, IBTA/Director Marketing Operations, Mellanox
Consumer Applications
Avery Lu, CMO, Palo Alto Scientific; Ajay Bhatia, Director Strategy, Seagate
Mobile Applications
Victor Le, President, Innodisk
Enterprise Applications
Jathin Ullal, Infrastructure Architect, Saygo
Data Recovery
Chris Bross, CTO, DriveSavers; Eddie Ramirez, Sr Director Applications Engineering, Seagate
New Technologies
Eric Evarts, Physicist, NIST
Controllers
Osso Vahabzadeh, Staff Design Engineer, Texas LDPC; Mike Barrell, Principal Controller Software Engineer, Seagate Technology
Interfaces
Richard Solomon, Technical Marketing Manager, Synopsys
SSDs
Sean Stead, SSD Marketing Chief, Viking Technology; Siamak Arya, President, Siamak Arya Consulting
PCIe SSDs
Debendra Das Sharma, Sr Principal Engineer, Intel/Member, PCI-SIG Board of Directors
NVMe
Peter Onufryk, Fellow NVM Solutions, Microsemi
Enterprise Storage
Barbara Murphy, VP Marketing, Weka.io
RRAM
Milind Weling, VP/GM Electronic Applications, Intermolecular
MRAM
Terry Hulett, VP/GM System Solutions, Everspin Technologies; Barry Hoberman, CEO, Spin Transfer Technologies
Embedded Applications
Tom McCormick, Chief Engineer/Technologist, Swissbit
SSD Performance
Kent Smith, Sr Director Product Marketing, Seagate
Education
Lara Dolecek, Associate Professor, UCLA EE Department
Testing
Dennis Martin, President, Demartek; Tarek Alhajj, Architect/Engineering Solutions Group, TechInsights
Hardware Design
Axel Kloth, CEO, SSRLabs; Brian Zahnstecher, Principal, PowerRox
Big Data
Rich Fetik, CEO, Data Confidential
Error-Correcting Codes
Bane Vasic, Professor, University of Arizona/Co-Founder, CodeLucida
Flash over Memory Interface
Mike Amidi, CEO, Xitore
IT End Users
Howard Marks, Consultant, DeepStorage
Employment
Tanya Freedman, VP Group Services, Connetics Communications
NVDIMM
Arthur Sainio, Director Product Marketing, SMART Modular; Jeff Chang, VP Marketing/Business Development, AgigA Tech
Storage Class Memory
Neal Christiansen, Development Lead, Microsoft; Murugasamy (Sammy) Nachimuthu, Lead Server Firmware Architect, Intel
Automotive Applications
Syed S Hussain, Director, Winbond Technology
Rugged Environments
Chris Budd, Director Engineering, SMART High-Reliability Engineering
FPGAs
Shre Shah, Data Center Architect, Xilinx
Software-Defined Storage
Jean Bozman, VP/Principal Analyst, Hurwitz and Associates
3D Xpoint™ Technolog
Michael Abraham, Business Line Manager, Micron
Virtual Reality
Neil Smith, Corporate Account Manager, LumaForge
Wednesday, August 10th
Wed, Aug 10th
8:30-10:50am
Forum E-21: Controllers and Flash Technology Part 1 (Controllers Track)
Organizer/Chairperson: Erich Haratsch, Engineering Director, Seagate
Paper Presenters:
Controller IC Evaluation of High Radix Parity Check Code
Oliver Hambrey, Research Engineer, SIGLEAD Europe
High-Throughput LDPC Solution for Reliable and High Performance SSD
Jiangli Zhu, Principal Engineer, VIA Technologies
Ultra High Throughput ECC for SSD
Yuluen Wang, Sr Engineer, Silicon Motion
Compression: Making Flash (Even) Cheape
Thomas Parnell, Research Staff Member, IBM Research - Zurich
Advanced Controller Technology for 3D NAND Flash
Wei Lin, System Architect, Phison Electronic,
Forum Description:
This forum provides details on improving the endurance, retention, and performance of 2D and 3D NAND flash devices. Important strategies and signal processing that controllers can employ to further improve these key reliability measures are revealed. The forum also presents novel implementations for speeding SSD performance. Learn about new technology developments and have time for questions and answers with top industry experts.
Intended Audience:
Design engineers, engineering managers and directors, hardware and firmware architects, field application engineers, software developers, test and failure analysis engineers, system designers and analysts, storage engineers and managers
About the Organizer/Chairperson:
Erich Haratsch is Director of Engineering, Firmware Architecture for Flash Controllers at Seagate Technology. He leads the development of advanced features for best-in class SSD performance, endurance, NAND flash management, signal processing and error correction coding for solid-state drive controllers.  Before joining Seagate, Haratsch was Director of Engineering at LSI, where he pioneered advanced signal processing and LDPC-based error correction algorithms for solid-state drive controllers. Earlier in his career, Haratsch developed signal processing and error correction technologies for several generations of HDD controllers at LSI and Agere Systems, which shipped in more than one billion chips. He previously worked at Bell Labs, where he invented new equalizer and decoder architectures for Gigabit Ethernet over copper and optical communications. Haratsch is a frequent speaker at leading industry events, is the author of over 40 peer-reviewed journal and conference papers, and holds more than 100 US patents.  He earned his MS and PhD degrees from the Technical University of Munich (Germany).
Wed, Aug 10th
8:30-10:50am
OPEN Forum G-21: Enterprise Applications Part 3 (Enterprise Applications Track)
Organizer/Chairperson: Tom Burniece, President, Burniece Consulting Services
Paper Presenters:
Implementing a Follow-the-Sun Master Database
Scott Harvey, VP Engineering, Atmosera
Delivering Memory Performance with Shared Flash
Gurmeet Goindi, Technical Product Strategist - Exadata, Oracle
Taking Multiple PCIe SSDs and NVMe to Performance Extremes
Richard Leonarz, Sr Marketing Manager, Samsung Electronics America
Enterprise Flash Storage Solutions: Professional Sports Franchise Success Story
Raj Das, VP Business Development, Violin Memory
Are You Ready for the Digital Transformation?
Chris Tsilipounidakis, Product Marketing Manager, Tegile Systems
Customer Case Study
Satish Lakshmanan, Sr Director Product Marketing Management, Western Digital
Session Description:
Flash memory has enabled new storage system and computing architectures which can handle many enterprise applications far more efficiently than is possible with hard drives. This session will feature actual case studies by innovative storage companies, including descriptions of the problem, approach, and results. Applications will include virtual desktops, streaming media, SQL and NoSQL databases, OLTP, data warehousing, big data analytics, Hadoop/MapReduce, financial transactions, and in-memory computing. Customers will co-present with some speakers.
Intended Audience:
IT Managers, Application Administrators, Database Administrators, Application Developers, Data Center Architects, Storage Architects, Infrastructure Architects, System Architects, Storage Engineers, Storage Specialists, Software Engineers, Storage Managers, Network Engineers, Marketing Engineers, Consultants, Analysts, and System Administrators.
About the Organizer/Chairperson:

Tom Burniece is an independent business consultant with over 30 years of senior management experience in the networking and storage markets. He specializes in strategy formulation, business development, marketing, and due diligence. He has worked with well over 50 companies from unfunded startups to large public corporations, including venture and private equity firms.

He is a highly experienced CEO and board member and has been general manager with profit and loss responsibility for a billion-dollar division of Digital Equipment. Before becoming an independent consultant, he was also Chairman of Ciprico and a senior executive at Maxtor and Control Data. He holds a BEE from the University of Minnesota and an MSEE from Arizona State University. He is also a graduate of MIT’s Sloan Senior Executive Program.

Wed, Aug 10th
8:30-10:50am
Forum D-21: Enterprise Storage Design Part 2 (Enterprise Storage Track)
Organizer: Rob Peglar, VP Advanced Storage, Micron Technology
Chairperson: Gary Tressler, Sr Technical Staff, IBM
Paper Presenters:
Extend the Life of Your SAN with Flash
Andrew Flint, VP Marketing, IOFabric,
All Flash Storage Sparing to Improve Endurance
Eduardo Duarte, Product Line Manager, HPE
A Solid State Storage Solution Driven by an Arria® 10 FPGA with Embedded ARM® Cortex®A9"
Amit Saxena, VP Engineering, Mobiveil
Stream-Optimized Data Reduction for Enterprise Flash Storage
Louis Imershein, VP Product, Permabit
Maximizing Leading Edge Flash for Systems
Larry O'Connor, CEO, Other World Computing
Guaranteeing Enterprise Class Availability in a Flash Environment
Phill Gilbert, Product Line Manager, HPE
Session Description:
Enterprise storage today must change to meet new data center requirements. Cloud computing and big data are among the latest drivers, but existing issues such as virtualization, data tiering, architecture, and data policy still must be addressed. Meanwhile, the numbers of applications and users continues to expand, as do the needs for rapid, on-line access. Solid state storage is an important tool in satisfying increased demand and providing faster access at reasonable cost. However, managers must understand what flash technology can provide and how to make cost/performance tradeoffs. Flash-centric issues such as write amplification, wear, and endurance must also be handled. And one must consider the role flash plays in such new developments as workload-aware storage, handling of big data, scalable architectures, and storage QoS.
Intended Audience:
Network and Data Center Directors; Managers and Engineer; Enterprise Storage System Designers; Software Designers, Enterprise Flash and SSD Product Managers & Marketing Engineers; Large-Scale Systems Designers; Investors & Analysts.
About the Organizer:

Rob Peglar is Sr VP/CTO at startup Symbolic IO, where he focuses on making complex workloads simpler, optimizing the use and understanding of data by businesses, and educating storage users. He was previously Vice President, Advanced Storage at Micron Technology, and a member of the Storage Business Unit’s five-person global leadership team. The unit, with $3-plus billion dollars annual revenue, provides solid state disk (SSD) and other non-volatile memory products such as 3D NAND and 3D Xpoint™.

Rob is a 40-year veteran of the storage industry, published author, and frequent industry speaker at leading storage and cloud-related seminars and conferences worldwide. He was previously CTO Americas for EMC Isilon, responsible for customer-facing scale-out NAS technology requirements, designs, and implementations. Rob’s team directed hundreds of strategic customer engagements, spanning multiple product releases and integrated solutions stacks. His team pioneered the first customer deployments of the Hadoop Filesystem (HDFS) embedded in a scale-out NAS platform.

He has also been a Senior Fellow and VP Technology at Xiotech, principal storage architect for StorageTek, and Manager of UNIX Development for ETA Systems.

Rob is a member of the Board of Directors of the Storage Networking Industry Association (SNIA) and a member of the Program Executive Committee for the Flash Memory Summit. He holds a BS in computer science from Washington University (St. Louis, MO) and did graduate work there.

About the Chairperson:
Gary Tressler is a Distinguished Engineer and the Memory Subsystem Development Technical Lead in IBM’s Systems Group. He is focused on driving system integration of DRAM and flash solutions, and on assessment and exploitation of emerging memory technologies. Gary is recognized as an IBM Master Inventor for his innovation leadership, and he currently represents IBM on the JEDEC Board of Directors. Gary received a BSEE from Case Western Reserve University, and an MSEE from Syracuse University.
Wed, Aug 10th
8:30-10:50am
Forum K-21: Open-Source Software and Flash Memory (sponsored by CNEX Laboratories) (Software Track)
Organizer: Brian Berg, President, Berg Software Design
Chairperson: Kimball Brown, Sr Director Alliances, Blackridge Technology
Paper Presenters:
Open Source Software: How the Flash Industry Can Use It Effectively
Nithya Ruff, Director Open Source Strategy Office, Western Digital
Building High Performance, High Capacity, Cost-Efficient All-Flash Cloud Storage System with Ceph
Jian Zhang, Sr Software Engineer, Intel, Jack Zhang, Sr Solution Architect, Intel, AND Yuan Zhou, Sr Software Engineer, Intel
Improving Ceph Performance while Reducing Costs
Rick Stehno, Sr Database Performance Architect, Seagate
Ceph Meets NVMe - All-Flash Ceph!
Gunna Marripudi, Principal Architect, Samsung, and Brent Compton, Director Storage, Red Hat
LightNVM Brings the SSD Flash Translation Layer to the Linux Kernel
Matias Bjorling, Member Technical Staff, CNEX Labs
Ceph-High Performance Without High Costs
Allen Samuels, Engineering Fellow, Western Digital
Forum Description:
There is little question but that open-source software will play an ever-increasing role in future data centers. In particular, the companies that run megawebsites and clouds are able to achieve such high economies of scale that rather than pay huge licensing or maintenance charges for the software they need, they can afford to build out their own software infrastructure. They would much rather contribute to open-source projects and pay for support only when they need it. Flash plays two roles in the greater emergence of open-source software. In the first place, flash-related system software may itself be open-source. Secondly, the issue emerges of making open-source software utilize flash efficiently and take full advantage of its full availability. This latter issue applies especially to storage software such as Ceph which offers a combination of a traditional relational database with newer object-based methods. Ceph needs to provide access to flash facilities, as well as itself running efficiently to today’s flash-heavy environments.
Intended Audience:
Software and hardware engineers and engineering managers; software specialists; systems analysts and engineers; product planners and managers; software managers; technical marketing engineers and managers
About the Organizer:
Brian Berg is President of Berg Software Design, a consulting organization offering software design services in the storage arena.  His extensive experience with a wide variety of storage devices and interfaces includes work as a project leader, software developer, industry analyst, technical marketer, technical writer, and expert witness.  His consulting clients include Adaptec, Fujitsu Computer Products, Intel, National Semiconductor, Silicon Graphics, and Sony Electronics.  He has been a speaker, session chair, and conference chair at over 50 conferences.  He holds a BS degree from Pacific Lutheran University, and has done graduate work in Computer Science and Electrical Engineering at Stanford University.
About the Chairperson:
Kimball Brown is Senior Director Alliances at security software firm BlackRidge Technology. He was previously a Technical Strategist at VMware, where he drove all product management and engineering workstreams between VMware HP and later Cisco. He has also been VP Senior Datacom Analyst at LightCounting, VP Business Development at Server Engines, and VP Marketing at server adapter maker Neterion. He also spent six years at Gartner as VP Chief Analyst Servers. He has long experience in the server market managing OEM and partner relationships, writing press releases, managing trade shows, developing company revenue forecasts and valuation models, and interacting with analysts and press. He has written many articles and spoken at many events. Kimball earned an MBA from UC Berkeley and a BSEE from Duke University.
Wed, Aug 10th
8:30-10:50am
Forum Q-21: Flash in Big Data and Analytics (Data Management Track)
Organizer: Steve Knipple, Principal Consultant, Cloud Shift Advisors
Chairperson: KRS Murthy, CEO, I Cubed
Paper Presenters:
Frog Storage: Towards Unified Storage for Large Scale Analytics
Vineet Chadha, Sr Staff Researcher, Huawei
Big Data and the Role of 3D NAND Flash in the All-Flash Array
Sean In, Director Product Management/Strategy, Violin Memory,
Unified Memory for HPC and Big Data
Axel Kloth, CEO, SSRLabs
Accelerating Business Analytics with Flash Storage and FPGAs
Satoru Watanabe, Research Engineer, Hitachi
Reducing Big Data Analytics Power Consumption with Emerging Storage Technologies
Jerome Gaysse, Emerging Data Center Technologies Expert, JGC
Session Description:
Flash memory will play an important role in the implementation of real-time business analytics. High-speed storage and application acceleration will both be essential to move and process petabytes or exabytes of data. Solutions will require the fastest all-flash arrays available, as well as FPGAs, specialized processors, and unified memory techniques. A great deal of effort will be necessary to find solutions with enough throughput that still are feasible in terms of cost, space, and power consumption.
Intended Audience:
Software and hardware engineers and engineering managers; software specialists; systems analysts and engineers; product planners and managers; software managers; technical marketing engineers and managers.
About the Organizer:

Steve Knipple is Principal Consultant at Cloud Shift Advisors, a management and technology consulting firm focused on helping organizations move their IT infrastructure and operations to the cloud.  Steve advocates a highly structured, transparent, and strategic approach working with firms to develop a clear cloud vision, a detailed assessment of their current state, and actionable implementation roadmaps.

He was previously CTO and VP Engineering at Atmosera (previously EasyStreet) where he engineered and operated complex private cloud infrastructure for clients in healthcare, manufacturing, financial services, education, and retail.  Steve led Atmosera to be an early provider of “extreme” performance private clouds using flash enabled technologies to meet the needs of the most demanding workloads.  Recognizing early the importance of hybrid cloud computing, Steve positioned Atmosera as a key Microsoft partner allowing them to add Azure services to their already deep private cloud offerings.

With over 20 years of experience, Steve has worked at the local, regional, national, and international level.  Besides cloud computing, Steve has extensive experience in infrastructure strategy and architecture, including business continuity and disaster recovery.

Steve frequently speaks to audiences in a variety of forums on the topics of cloud computing and IT transformation. He holds an MS in Applied Information Management from the University of Oregon and BS in Engineering from the University of Wisconsin.

About the Chairperson:

KRS Murthy is an experienced venture capitalist and serial entrepreneur. He is currently focused on mergers and acquisitions, corporate governance, big data strategy, and competitive strategy. He has led many companies at many different stages and has grown companies to sales of over $500 million. He is a popular speaker at conferences around the world and a leader in many technical societies, including IEEE Nanotechnology Council, IEEE Engineering Management Society, IEEE Computer Society, Silicon Valley Engineering Council, and IEEE Standards Board.

Murthy also has experience as a Country Manager for AT&T and AT&T Bell Labs and as a professor of computer engineering at California State University, Fullerton. He has received a Distinguished Service Award from the IEEE Engineering Management Society and a Distinguished Achievement Award from the President of India.

Wed, Aug 10th
8:30-10:50am
Forum R-21: Persistent Memory - Beyond Flash (sponsored by SNIA SSSI) (Persistent Memory Track)
Organizer: Jim Ryan, SNIA/SSSI Chair and Manager, Intel
Chairperson: Jim Pappas, SNIA Vice-Chair and Director Initiative Marketing, Intel
Paper Presenters:
Building Datacenter Infrastructure Using Persistent Memory
Rob Peglar, VP Advanced Storage, Micron
Networking New Persistent Memory Technologies
Rob Davis, VP Storage Technology, Mellanox Technologies
New Software Architectures for Persistent Memory
Ken Gibson, Director NVM Software Architecture, Intel
Enabling Persistent Memory: The NVM Programming Model
Doug Voigt, Distinguished Technologist, HP Enterprise
Storage Class Memory in Windows
Neal Christensen, Principal Development Lead, Microsoft
Opportunities and Challenges Arising from Bringing NVRAM Technology into SAP HANA In-Memory Platform
Zora Caklovic, Sr Director SAP HANA Product Management, SAP Labs, AND Oliver Rebholz, Development Manager, SAP HANA In-Memory Platform
Forum Description:
This track will offer a unique interplay among the elements required to speed the adoption of Persistent Memory (PM), which is already underway. You’ll hear from leading OSVs, ISVs, creators of the NVM Programming Model, and vendors of today’s NVDIMMs and emerging memory technologies. These elements will collectively bring the long-anticipated vision of the convergence of memory and storage to reality – you need to be there to take advantage of this unique development.
Intended Audience:
Track participants will speak to their fellow ISVs, OSVs and technology vendors. An additional critical audience is data center managers and IT architects and strategists responsible for setting the course for and executing technology adoption.
About the Organizer:

Jim Ryan is a manager in Intel’s Datacenter and Connected Systems Group, where he specializes in managing “Special Interest Groups”. Jim won the “Intel Achievement Award”, the highest level of recognition given to an employee.  A founder of the industry leading OpenFabrics Alliance (OFA) , he has been its chair for over 10 years. The OFA, a well-recognized  source of software stacks for Linux and Windows for InfiniBand, iWARP and RoCE, is initiating work on developing the relationship between high-performance data center networks and nonvolatile memory (NVM).

Jim is also the Chair for SNIA’s Solid State Storage Initiative (SSSI), where he led the promotion of the NVM Programming Model and co-founded the NVDIMM SIG.  With Intel for 16 years, Jim has 40 years of experience in the finance and high-technology industries.   He holds an MBA with distinction from UC Berkeley.

About the Chairperson:
Jim Pappas is the Director of Technology Initiatives in Intel’s Data Center Group. He is responsible for establishing broad industry ecosystems for new technologies in enterprise I/O, energy-efficient computing, and solid state storage. Jim has founded or participated in organizations in these areas including: PCI Special Interest Group, Storage Networking Industry Association (SNIA), InfiniBand Trade Association(IBTA), Open Fabrics Alliance (OFA), The Green Grid, and emerging initiatives in his latest focus area of solid state storage. Mr. Pappas previously held the same position in Intel’s Desktop Products Group, where he led the successful development of technologies such as USB, AGP Graphics, DVD, IEEE 1394, Instantly Available PC, and PCI. Mr. Pappas has over 30 years of experience in the computer industry. He has been granted eight U.S. patents in computer graphics and microprocessor technologies. He has also spoken at many major industry events. He holds a BSEE from the University of Massachusetts, Amherst.
Wed, Aug 10th
11:00-11:30am
Kyo-Won Jin photo
OPEN - Keynote 7: NAND Satisfies Both Performance-Based and Cost-Sensitive Enterprise Applications
Speaker: Kyo-Won Jin, Sr VP, Head of NAND, SK Hynix
Introducer: Jim Handy, Director/Chief Analyst, Objective Analysis
Abstract:

NAND flash satisfies both performance and capacity needs in today’s enterprise market. On the one hand, NAND flash can provide the low latency and high bandwidth required by high-performance computing, analytics, security, database, video, media and entertainment, and financial applications. On the other hand, it can offer low-enough costs, particularly when operating expenses are considered, to replace hard drives in ordinary business applications and even in archiving, disaster recovery, and backup. 3D NAND can extend NAND’s capabilities even further in both areas, and means that flash will also be the major storage mechanism in emerging areas such as clouds and hyperconverged infrastructures.

About the Speaker:

Kyo Won Jin is Senior Vice President and Head of the NAND Division at SK Hynix. He is responsible for all NAND development activities from product planning through development and productization. He previously oversaw the DRAM Product Development Group and NAND Product Planning Office.

With his extensive 30 years of experience in DRAM and NAND design, product planning, and productization, Kyo Won has played a major role in SK Hynix’s turnaround, helping the company become a global leader. He also served as the Head of the Semiconductor Planning Office at SK Telecom (a wireless telecommunications operator in Korea) for two years where he acquired broad knowledge of business development in the telecom industry.

In recognition of his contributions to the semiconductor industry, he was awarded the Presidential Citation of the Republic of Korea. He holds a BS in physics from Seoul National University.

About SK Hynix:
For more information, see SK Hynix.com
Wed, Aug 10th
11:30am-Noon
Jae Jeongphoto
Ryan Smith photo
OPEN - Keynote 8: 3D NAND is the Leadership Technology for Server Storage
Speaker: Ryan Smith, Director NAND Product Marketing, Samsung Semiconductor and Jaeheon Jeong,. Executive VP R&D, Samsung Memory Business
Introducer: Jim Handy, Director/Chief Analyst, Objective Analysis
Abstract:
To meet the demands of big data, cloud computing and real-time analysis, data center managers, enterprise customers and ecosystem partners require non-volatile memory with increased performance, higher densities, smaller footprints and a strong TCO. 3D NAND is the production methodology best able to meet those marketplace needs. Advances already in the pipeline will provide higher capacity devices with better operating characteristics for server workloads and for the ever-increasing needs of clouds and mega-websites. In particular, such devices will be especially well-suited for rapidly emerging NVMe SSD technology. Special requirements for low power consumption, small size, low latency, and ultra-high capacity will also be met. Technological progress will continue unabated along all of these avenues as 3D NAND reaches its full potential.
About the Speakers:

Ryan Smith is Director NAND Product Marketing at Samsung Semiconductor.  He is Samsung’s primary U.S. spokesperson on solid state drives and oversees all U.S. NAND marketing activities, making him a key figure in a multibillion dollar, industry-leading effort.  He has worked extensively on developing markets for both client and enterprise SSDs.  His current interests focus on NVMe and high-capacity SAS SSDs, as well as further extending NAND markets to such applications as the Internet-of-Things (IoT), video streaming, virtual reality, and security devices.  He has presented at many conferences for Samsung, including VMworld, Samsung SSD Global Summit, Storage Visions, and previous Flash Memory Summits. He has prior experience in the storage industry with Xyratex, nStor, and ANDATACO.  He earned a BS in Information Decision Systems from San Diego State University.

Jaeheon Jeongis Executive Vice President of the Samsung Memory Business and currently oversees solution product R&D, which delivers flash storage products ranging from micro-SD cards to enterprise SSDs. Before taking on his current position, he was with Samsung’s controller team and later led its software development team. He initiated major industry-leading projects such as those involving the industry-first AHCI PCIe SSD, enterprise NVMe SSDs, and UFS solutions. Recently, he led the push behind the large-capacity storage that best utilizes V-NAND technology, including the world largest 2.5” 16TB SAS SSD. He also has played a key role in expediting the HDD to SSD transition.

About Samsung:
For more information, see Samsung.com
Wed, Aug 10th
2:00-2:30pm
Derek Dicker photo
OPEN - Keynote 9: The NVMe Inflection Point
Speaker: Derek Dicker, VP/Business Unit Manager - Performance Storage, Microsemi
Introducer: Frank Berry, President/Chief Analyst, IT Brand Pulse
Abstract:
NVMe SSDs are currently enabling a new level of performance for primary storage in enterprise and hyperscale applications, while maintaining full conformity with a widely used standard interface. Competition and technology innovation have enabled cost-effective products to come to market featuring varied form factors, capacities, and capabilities. Meanwhile, storage vendors are delivering enclosures optimized for aggregating and managing large numbers of NVMe SSDs. And lastly, the industry is rallying around standards efforts to help achieve interoperability and volume economics. Such initiatives include fabrics, drive- , and enclosure-management efforts. Opportunities still exist for more innovation in this exciting new tier of storage, involving both hardware and software.
About the Speaker:

Derek Dicker is VP/Business Unit Managerfor the Performance Storage Business Unit (PSBU) at Microsemi. He has P&L responsibility for PCIe storage switches, SSD controllers, and NV-RAM drives. Dicker previously was VP Performance Solutions Group at PMC-Sierra before its acquisition by Microsemi. At PMC, he led the team that introduced the first and fastest merchant enterprise NVMe PCIe SSD controller and NV-RAM drive portfolio, and introduced a new category of PCIe storage switches, including the first NVMe JBOD-optimized switch solutions.

Prior to launching the performance storage business unit, Dicker headed marketing for PMC’s enterprise storage division, where he and his team defined, launched, and ramped the company’s 12G SAS product portfolio, featuring industry-leading port count and performance SAS/SATA RoCs/IoCs and expanders. Before joining PMC, he was vice president and general manager for the networking division at IDT. He spent the early part of his career at Intel in sales and marketing positions, including the role of chief of staff/technical assistant to the executive vice president and general manager of the Intel Communications Group. Dicker earned a BS in Computer Science and Engineering from UCLA, and later attended the Stanford Executive Program.

About Micorsemi:
For more information, see Microsemi.com
Wed, Aug 10th
2:40-3:10
Phil Brace photo
OPEN - Keynote 10: Design Efficient Storage Systems with Both Flash and HDDs
Speaker: Phil Brace, President Cloud Systems and Silicon Group, Seagate
Introducer: Frank Berry, President/Chief Analyst, IT Brand Pulse
Abstract:
Efficient storage systems today involve both flash and HDDs. Flash provides fast access but limited capacity. HDDs provide huge capacities with relatively long access times. Proven, effective caching software will allow the best use of both kinds of storage. Direct transfers to and from storage elements (without processor involvement) will also speed up systems generally. The latest SMR HDDs can provide cost-effective storage in situations such as archiving that can tolerate longer access times. Designers must combine the latest flash and HDD technologies to produce optimized storage systems with the best cost per TB and per IOP. The end result will be better ROI for such applications as real-time data analysis, big data processing, and hyperscale data centers.
About the Speaker:

Phil Brace is president of Seagate’s Cloud Systems and Silicon Group, responsible for the full breadth of enterprise storage systems, flash technology, and silicon R&D. This includes Seagate's growth initiatives in cloud computing and solid state technology, optimized to build storage solutions for next-generation workloads and new levels of performance for OEM and cloud customers. Brace brings over 20 years of semiconductor and systems experience to his current role.

Brace previously headed up Seagate’s Electronics Solutions organization. Before joining Seagate, he spent nine years at LSI in senior technology and business leadership roles, including executive vice president of the Storage Solutions Group, senior vice president and general manager of the Storage Peripherals Division, and senior vice president of the marketing communications, corporate communications, investor relations and strategic planning functions.

Earlier in his career, Brace worked at Intel, where he served as general manager of Server Platforms Group Marketing, leading the organization charged with worldwide product and technical marketing, including demand creation for technologies across all of Intel’s server business.

Brace received his MSEE from California State University, Sacramento and his Bachelor’s degree in Computer Engineering from the University of Waterloo (Canada).

About Seagate:
For more information, see Seagate.com
Wed, Aug 10th
3:10-3:40pm
Daniel Cobb photo
OPEN - Keynote 11: Flash Storage Meets Persistent Memory: The Modern Data Center Changes Forever!
Speaker: Daniel Cobb, Sr., EMC Fellow, Vice President - New Media Strategy, EMC
Introducer: Frank Berry, President/Chief Analyst, IT Brand Pulse
Abstract:
The backdrop of big data volume, cloud data ubiquity, and IoT data velocity is putting tremendous pressure on data centers to increase their performance and scalability rapidly. The key to doing this is persistent memory, storage that operates at memory speeds. It will allow server designers and storage architects to define a new memory-centric architecture (MCA). The result is to exploit breakthrough technology capabilities to create a next-generation data center with real-time, high-frequency, low-latency data management frameworks.
About the Speaker:

Danny Cobb is a Fellow and VP New Media Strategy at EMC, where he leads global technology strategy and architecture for emerging storage media. His work is central to EMC’s leadership in the IT industry’s transition from hard drives to flash memory for primary storage. Cobb is currently responsible for the technological readiness, investment priorities, and product strategies that prepare EMC’s customers for the coming wave of emerging memories.

Danny also has led early stage product and technology initiatives as CTO of the Flash Technologies Division, Converged Infrastructure, and Data De-Duplication. His special interest areas include server and storage design, system performance, and the hardware/software interface.

Cobb was previously a founding team member of Storigen Systems (acquired by EMC), where he led system architecture and platform design for an innovative rich media delivery engine. His experience includes working on file systems at Avid Technology and operating systems at Digital Equipment.

Cobb earned a BS in Computer Science from the University of Vermont. He holds several patents in distributed systems and storage design, and he often advises early stage companies and venture capital firms.

About EMC:
For more information, see EMC.com
Wed, Aug 10th
3:50-6:15pm
Forum A-22: PCIe/NVMe Storage (PCIe StorageTrack)
Organizer/Chairperson: Dave Deming, President, Solution Technology
Paper Presenters:
PCI Express: Driving the Future of Storage
Debendra Das Sharma, Board Member, PCI-SIG
Advantages of PCI Express 4.0 Interface for SSDs
Richard Solomon, Technical Marketing Manager, Synopsys
Secure Boot for NVMe SSD
Larry Ko, VP Engineering, Sage Microelectronics
Disruptive NVMe Architecture Based on an FPGA Achieves over 1M IOPS
Eyee Hyun Nam, CTO, FADU
NVMe on OpenSSD
Yong Ho Song, Professor, Hanyang University
FPGA Implementation of Erasure Codes for NVMe based JBOFs
Manoj Roge, Director Wired and Data Center Solutions, Xilinx,
Session Description:
PCIe SSDs offer higher performance than ones based on disk interfaces, since they utilize the high-speed (and widely supported) PCIe bus. They have quickly become extremely popular in a wide variety of enterprise applications, particularly in implementations based on the new NVMe standard. Of course, all the usual design problems occur ranging from connectors through power management, power consumption, configurability, and hardware/software tradeoffs. But with over 100 million enterprise PCIe ports already shipped, this is an approach enterprises find to be high-speed, reasonably priced, and easily implemented. It can work in both client and data center applications.
Intended Audience:
Design engineers, hardware engineers, engineering managers, product and product marketing engineers, applications engineers, storage specialists and managers, storage technologists, systems engineers and analysts.
About the Organizer/Chairperson:

David Deming is the founder and President of Solution Technology, a long-time leader in providing training for the storage industry. David has over 30 years industry experience and has created many courses covering a wide range of storage and networking technologies including SCSI, SAS, SATA, Ethernet, Fibre Channel and FCoE, InfiniBand and RoCE, SAN/NAS, and iSCSI.

Throughout his long career, David has been an active participant in storage-related industry associations and standards committees. He led interoperability testing for the Fibre Channel Industry Association (FCIA) and also coordinated the industry's largest Interoperability Lab demonstration for the Storage Networking Industry Association (SNIA). David helped develop the original SNIA Certification Foundation’s Exams and provides training for Storage and Certification offerings by SNIA.

David has been a voting member of the NCITS T11 Fibre Channel standards committee and has served on the T10 (SCSI and SAS) standards committees. He is an active member of the SNIA Education Committees where he has received recognition for his efforts and contributions. David also participates in PCI-SIG, NVM Express, and the Open Fabrics Alliance to advance a wide range of technology standards.

Wed, Aug 10th
3:50-6:15pm
Forum C-22: SSD Concepts (SSDs Track)
Organizer/Organizer: Xinde Hu, System Architect, Western Digital
Paper Presenters:
Write-hotness Aware Retention Management
Saugata Ghose, Postdoctoral Research Associate, Carnegie-Mellon University
Data Reduction Technologies in SSDs
Carolyn Hanna, Sr Manager, HGST
Optimizing SSD Architecture for Client Workloads
Elad Baram, Sr Director Product Marketing Management, Western Digital
Management Schemes of Hybrid SSDs with SLC/MLC Flash Memory: A Survey
Ahmed Alsalibi, Graduate Student, University of Science - Malaysia (USM)
Enabling the Reliable TLC SSD System
Jeff Yang, Principal Engineer, Silicon Motion
3-D NAND SSDs Meet Low-Latency Requirements
Tien Shiah, SSD Product Marketing Manager, Samsung Electronics
Forum Description:
SSDs are playing a critical role in enterprise applications. Enterprise end users, storage designers, and engineers need to understand how the choices of NAND flash memory and controllers affect performance, endurance, and the resulting applications. This session will give participants important information on the needs of enterprise storage, adaptive flash, and server-side flash. It will also cover data reduction technologies and hybrid management schemes.
About the Organizer/Chairperson:

Xinde Hu is currently System Architect at SanDisk. His responsibility includes creating, designing, and evaluating innovative system architecture concepts and implementations for the next generations of non-volatile memory based storage systems.   Before joining SanDisk, Dr. Hu worked for STEC and STMicroelectronics as a system architect.

Dr. Hu has authored more than a dozen technical papers on coding/signal processing for data storage systems and has 40+ patent applications pending. He is currently Vice Chairman of the IEEE Data Storage Technical Committee (DSTC). He received his PhD in Electrical and Computer Engineering from Carnegie Mellon University.

Wed, Aug 10th
3:50-6:15pm
Forum E-22: Controllers and Flash Technology Part 2: Error Correcting Codes (Controllers Track)
Organizer/Chairperson: Kiran Gunnam, Technologist, Western Digital
Paper Presenters:
Practical Threshold Voltage Distribution Modeling
Yixin Luo, Graduate Student, Carnegie-Mellon University
Media Management for High Density NAND Flash Memories
Erich Haratsch, Engineering Director, Seagate
Flexible Controller Code Rate
Peter Graumann, Director, Microsemi
Spatially Coupled Coding and Non-Binary LDPC for Flash
TBD
Forum Description:
This forum describes recent developments in the implementation of LDPC (low density parity check) codes as applied to 2D and 3D NAND flash for error correction. You will learn practical aspects of low-power LDPC implementations, soft-decision decoding, and capacity optimization for NVM. Learn important insights from these industry experts and have time for direct questions and answers with them!
Intended Audience:
ECC engineers and specialists, design engineers, engineering managers and directors, hardware and firmware architects, field application engineers, test engineers, system designers and analysts , storage engineers and managers
About the Organizer/Chairperson:

Kiran Gunnam is a Technologist in Western Digital’s Storage Architecture Research Group, where he focuses on creating and developing new storage and computing related projects. He was previously Director of Engineering at Violin Memory and also held R&D positions at Nvidia, Certicom, LSI, Marvell, Schlumberger, and Intel.

Dr. Gunnam is an expert in IC implementation of communications and signal processing systems. His PhD research contributed several key innovations in advanced error correction systems based on low-density parity- check codes (LDPC) and led to several industry designs. He has done extensive work on ASIC hardware architecture, micro-architecture, and digital IC implementation for many applications (including IEEE 802.11n Wi-Fi, IEEE 802.16e WiMax, IEEE 802.3 10-GB, holographic read channel, HDD read channel, and flash read channel).

Dr. Gunnam has over 60 patents with several others pending. He was an IEEE Solid State Circuits Society Distinguished Lecturer for 2013 and 2014. He received the MSEE and PhD in Computer Engineering from Texas A&M University.

Wed, Aug 10th
3:50-6:15pm
Forum F-22: SSD Testing (Testing Track)
Organizer/Chairperson: Easen Ho, President, S3Metrics
Paper Presenters:
Large-Scale Study of In-The-Field Flash Failures
Onur Mutlu, Professor, Carnegie-Mellon University
NVMe Performance – Local vs. Remote
Gunna Marripudi, Principal Architect, Samsung Semiconductor, and Oscar Pinto, Sr Staff Storage Architect, Samsung Semiconductor,
Comparison of NAND Flash Functionality with Internal Probing and Waveform Analysis
Tarek Alhajj, Architect Engineering Solutions Group, TechInsights
SSD Production Test for High Volume Manufacturing
Kevin Dumas, Product Manager, Teradyne
Lifecycle Testing for SSD Production
Marilyn Kushnick, Engineer, Advantest
Forum Description:
Description: Testing is an essential part of SSD development and system evaluation. Conformance to standards, behavior under environmental stress, and the effects of varying workloads and system conditions must all be checked thoroughly. Performance analysis is also a key to determining how devices will behave in operation and in comparing devices during the evaluation stage. One problem of particular concern is wear, since the underlying memory elements are known to fail after a certain number of writes have been performed. Evaluations must be done with workloads that reflect actual client experience to ensure validity. Interface testing adds further complexity, particularly with the emergence of high-speed PCIe as an alternative to the well-understood disk interfaces.
Intended Audience:
Test engineers, hardware design engineers, engineering managers, system engineers and analysts, product engineers and managers, product planners.
About the Organizer/Chairperson:
Easen Ho is the president of S3Metrics, a consultancy specializing in SSD testing. He was formerly CTO of Calypso Systems, a leading solid state technology test equipment and test services company. Easen has been active in test standards development, and has given many talks at events such as Flash Memory Summit. He is a principal architect of the SNIA Solid State Storage Performance Test Specification. He received his PhD from MIT and an MS from Tokyo Institute of Technology, both in laser and optical engineering. He has been involved in many storage ventures over the last 15 years, including being Founder and President of Digital Papyrus.
Wed, Aug 10th
3:50-6:15pm
Forum M-22: 3-D Flash (New Technologies Track)
Organizer: Rahul Advani, Director Flash Products, Microsemi; Shawn Adams, Product Marketing Manager Enterprise SSD, Micron Technology
Chairperson: Rahul Advani, Director Flash Products, Microsemi
Paper Presenters:
NAND Satisfies Both Performance-Based and Cost-Sensitive Enterprise Applications
J W Kim, Sr VP Head NAND Development, SK Hynix
SSD Flash Management for 3D NAND Flash Memory
Curry Zhang, Sr System Engineer, VIA Technologies
The Frontier for 3D NAND Flash Technology
Chris Geiser, Director Sales, Samsung Electronics America
3D NAND Assessment for Next Generation Flash Applications
Gary Tressler, Sr Technical Staff Member, IBM
3-D NAND SSDs Meet Low-Latency Requirements
Kevin Kilbuck, Marketing Director, Micron
Overcoming Challenges in 3D NAND Volume Manufacturing
Harmeet Singh, Corporate VP, Lam Research
Forum Description:
3D flash continues to advance and will soon dominate flash technology! This forum provides details you need for important strategy and implementation decisions. It will examine how 3D NAND can save you money in next-generation designs. Learn key insights about this vital technology and have time for questions and answers with top industry experts.
Intended Audience:
Product strategists, design engineers, engineering managers and directors, hardware and firmware architects, field application engineers, software developers, test engineers, system designers and analysts, storage engineers and managers
About the Organizers/Chairpersons:

Rahul Advani is Director Flash Products at Microsemi, where he is responsible for product marketing for PCIe controllers and memory selection for enterprise storage lines (NAND, DRAM, and next generation memories). He is involved in product planning and development, market analysis and strategy, partnership and ecosystem development, and long-term planning. He was previously Director Enterprise Marketing at Micron Technology and Director Technology Planning at Intel, where he focused on system-level architecture and process technology. He has over 15 years of experience in the technology industry. Rahul holds a PhD in Engineering from MIT and a BSEE from Cornell.

Shawn Adams is a Product Marketing Manager at Micron Technlogy, where he focuses on client SSD and NAND marketing. A 16-year veteran of the technology industry, he has led product development, strategy, and marketing for hardware and software portfolios. He has experience in both domestic and international markets and in a broad range of virtual market segments. Before joining Micron Technology, he worked for Healthwise, DBSI, and MPC. He holds an MBA from Northwest Nazarene University and a Bachelor’s in Business Administration from Idaho State University.
Thursday, August 11th
Thurs, Aug 11th
9:45-10:50am
Forum E-31: Flash Controller Design Options (Controllers Track)
Organizer/Chairperson: Thomas Parnell, Research Staff Member, IBM Research - Zurich
Paper Presenters:
Low-Error Floor Soft-Decision Finite Alphabet Iterative Decoders
Shiva Planjery, CEO, CodeLucida
High-Speed LDPC ECC with 5000x Read Cycle Extension for Enterprise SSDs
Yoshiaki Deguchi, Undergraduate Student, Chuo University (Japan)
Ultra High Throughput ECC for SSD
Jeff Yang, Principal Engineer, Silicon Motion
False Decoding Probability (a.k.a. Detection) of BCH and LDPC Codes
Alessia Marelli, Staff Product Design Engineer, Microsemi
On Overcoming the Effects of Stopping Sets in Error Correction Codes
Ravi Motwani, Principal Engineer, Intel
Reliability Tradeoffs For Flash-Based Error Correction
Steven Shrader, Chief Architect, Mobiveil
Forum Description:
This forum presents ways to increase the endurance and retention of current and future NAND flash storage devices. It also details new approaches for faster development of flash-based storage systems. Learn about new technology developments and have time for questions and answers with industry experts and insightful academics.
Intended Audience:
Design engineers, engineering managers and directors, hardware and firmware architects, field application engineers, software developers, test engineers, system designers and snalysts, storage engineers and managers
About the Organizer/Chairperson:
Thomas Parnell is currently a Research Staff Member at IBM Research –Zurich, where he is developing advanced controller technology for the next-generation of IBM FlashSystem(TM) products. He was previously the co-founder and CTO of Siglead Europe, a UK-limited subsidiary of Yokohama-based Siglead, developing signal processing and coding algorithms for HDD, flash, and emerging storage technologies. He has made presentations at several conferences including previous Flash Memory Summits and has several publications. He received his BSc and PhD in Mathematics from the University of Warwick (UK).
Thurs, Aug 11th
11:00-11:30am
Tom Isakovich photo
OPEN - Keynote 12: Scaling Flash Storage Efficiently in the Exabyte Era
Speaker: Tom Isakovich, CEO, Nimbus Data
Introducer: Jean Bozman, VP/Principal Analyst, Hurwitz and Associates
Abstract:
The amount of data organizations have is increasing at an incredible rate. Petabytes are commonplace, and exabytes are the next frontier. Flash memory will be essential for processing huge amounts of data at reasonable speeds, while at the same time recognizing constraints on cost, power, and space. But how do we scale all that flash? Simple scale-out methods increase latency and energy consumption. However, scale-up arrays are expensive, and scale-out clusters are difficult to manage. A federated approach is the best answer. It allows for significant expansion without raising latency or energy consumption greatly. The idea is to do as much processing as possible at the lowest level possible, minimizing transfers between units and thus keeping costs, latency, and energy consumption under control.
About the Speaker:
Thomas Isakovich is CEO and founder of Nimbus Data, overseeing product strategy and development, sales, marketing, and manufacturing operations. Thomas founded Nimbus Data to build the next great storage systems company by combining smart software with non-volatile memory technology, offering superior data delivery, protection, and operating efficiency. Prior to Nimbus Data, Thomas was CEO and founder of TrueSAN Networks, where he raised over $34 million and led the development of storage virtualization and multi-vendor SAN management software. At Oracle spin-off Network Computer (also known as Liberate Technologies), Thomas oversaw product marketing for the company’s line of thin-client workstations and server software. At IBM’s Almaden Research Center, Thomas developed new technologies for simplifying and enhancing human-computer interaction. A frequent speaker on technology and entrepreneurship at universities and industry events, Thomas earned a B.A. with Honors in political science from Stanford University.
About Nimbus Data:
For more information, see NimbusData.com
Thurs, Aug 11th
11:30am-Noon
George Minassian photo
OPEN - Keynote 13: RRAM: Your Key to Creating Faster, More Scalable Storage
Speaker: George Minassian, CEO, Crossbar
Introducer: Jean Bozman, VP/Principal Analyst, Hurwitz and Associates
Abstract:
Imagine a high capacity memory technology with 100X lower latency, one-twentieth the power consumption, and 1000X higher endurance than today’s NAND flash. Resistive RAM (RRAM) is that technology. Today’s devices are available now to serve the low energy internet-of-things applications, secure or general-purpose micro controllers, sensors and actuators connected systems that require extremely low power, high performance, endurance and reliability. Devices on the horizon will be suitable for high-density, low latency storage class memory for data centers and media-rich mobile applications. RRAM also has a path to 5 nm solutions where NAND flash will have difficulty competing. Now is the time for storage system designers to consider RRAM for their next-generation designs
About the Speaker:
Dr. George Minassian is co-founder and CEO of Crossbar, where he leads the development of low-power, high-performance, high-density RRAM memory technology. Dr. Minassian has a proven track record of developing commercially successful, leading-edge memory and communications products. Before joining Crossbar, he worked at Spansion, most recently as VP System and Software Engineering. While at Spansion, he led the $1.2 billion flash memory business targeting the cellular wireless market. He also developed new industry standards in emerging technology and established a successful track record for large-scale product development and management. He was previously Director of Wireless Engineering at Advanced Micro Devices, where he developed the industry’s first CMOS RF process and complete 802.11b/a chipset and reference designs. Dr. Minassian holds a Ph.D. in Electrical Engineering and Computer Science from the University of Texas at Austin.
About Crossbar:
For more information, see Crossbar.com
Thurs, Aug 11th
Noon-12:30pm
Paul Prince photo
OPEN - Keynote 14: NVMe over Fabrics Offers Top Performance for Real Time Analytics
Speaker: Paul Prince, CTO, Mangstor
Introducer: Jean Bozman, VP/Principal Analyst, Hurwitz and Associates
Abstract:
The demand for real-time analysis of huge datasets provides a major challenge for storage providers. Flash-based storage must offer more bandwidth, higher density, and lower prices. One solution is to offer NVMe/PCIe SSDs connected via high-speed fabrics. The result is a powerful combination of scalability, fully shared resources, high bandwidth, and exceptionally low latency, as compared to alternatives such as SAN-connected flash arrays. Products are already available that are optimized for high performance computing and big data problems. Such storage array products can deliver data to analytics algorithms at the bandwidth required for real-time operation.
About the Speaker:

Paul Prince is CTO at Mangstor, where he provides strategic product and business planning, technology and product development, talent development and retention, and strategic communications with company top executives, press, analysts, and customers. A successful technology professional with over 20 year experience leading architecture and technology development at premier computer technology and product companies, he has demonstrated deep technology insight, proven leadership in functional and strategic initiative management roles, and the ability to translate leading edge technology trends into real-world products.

Before joining Mangstor, he was CTO at Dell, where he was responsible for technology direction, investigation, and development for Dell servers. Prior to working at Dell, Paul was Platform Architecture Director at Intel, where he was executive leader of all server system architecture and technology and led a geographically diverse team of over 100 engineers and architects. He holds an MSEE from the University of Utah

About Magstor:
For more information, see Magstor.com